I found that the behaviour for readInputRegisters8i and readHoldingRegisters8i is different and readHoldingRegisters8i potentially has a bug.
In the readHoldingRegisters8i function you have a for-Loop that swaps the order of the bytes in the received answer from the Holding Register read, regardless of the byte order setting.
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if(data != NULL) |
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{ |
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for(uint8_t i=0 ; i<mmodbus.rxBuf[2] ; i+=2) |
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{ |
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uint8_t H = mmodbus.rxBuf[i+3]; |
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mmodbus.rxBuf[i+3] = mmodbus.rxBuf[i+3+1]; |
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mmodbus.rxBuf[i+3+1] = H; |
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} |
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memcpy(data, &mmodbus.rxBuf[3], mmodbus.rxBuf[2]); |
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} |
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return true; |
Then, in for example readHoldingRegisters16i for example depending on the byte order setting, the bytes are swapped again.
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uint8_t tmp1[2],tmp2[2]; |
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for(uint16_t i=0 ; i<length ; i++) |
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{ |
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switch(mmodbus.byteOrder16) |
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{ |
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case MModBus_16bitOrder_AB: |
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memcpy(tmp1, &data[i], 2); |
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tmp2[0] = tmp1[0]; |
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tmp2[1] = tmp1[1]; |
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memcpy(&data[i], tmp2, 2); |
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break; |
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default: |
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memcpy(tmp1, &data[i], 2); |
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tmp2[0] = tmp1[1]; |
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tmp2[1] = tmp1[0]; |
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memcpy(&data[i], tmp2, 2); |
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break; |
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} |
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} |
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return true; |
This is inconsistent with the way the answer for the input register read is processed, where in readInputRegisters8i the data is just copied directly and then in readInputRegisters16i the byte order is swapped depending on the byte order setting.
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if(data != NULL) |
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memcpy(data, &mmodbus.rxBuf[3], mmodbus.rxBuf[2]); |
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return true; |
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uint8_t tmp1[2],tmp2[2]; |
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for(uint16_t i=0 ; i<length ; i++) |
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{ |
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switch(mmodbus.byteOrder16) |
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{ |
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case MModBus_16bitOrder_AB: |
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memcpy(tmp1, &data[i], 2); |
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tmp2[0] = tmp1[0]; |
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tmp2[1] = tmp1[1]; |
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memcpy(&data[i], tmp2, 2); |
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break; |
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default: |
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memcpy(tmp1, &data[i], 2); |
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tmp2[0] = tmp1[1]; |
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tmp2[1] = tmp1[0]; |
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memcpy(&data[i], tmp2, 2); |
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break; |
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} |
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} |
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return true; |
This leads to inconsistent behaviour between reading an input or holding register.
Can you confirm this is a bug, or is this intended behaviour and I'm missing something here?
I found that the behaviour for readInputRegisters8i and readHoldingRegisters8i is different and readHoldingRegisters8i potentially has a bug.
In the readHoldingRegisters8i function you have a for-Loop that swaps the order of the bytes in the received answer from the Holding Register read, regardless of the byte order setting.
master-modbus/mmodbus.c
Lines 456 to 466 in f5f8ebd
Then, in for example readHoldingRegisters16i for example depending on the byte order setting, the bytes are swapped again.
master-modbus/mmodbus.c
Lines 540 to 559 in f5f8ebd
This is inconsistent with the way the answer for the input register read is processed, where in readInputRegisters8i the data is just copied directly and then in readInputRegisters16i the byte order is swapped depending on the byte order setting.
master-modbus/mmodbus.c
Lines 330 to 332 in f5f8ebd
master-modbus/mmodbus.c
Lines 406 to 425 in f5f8ebd
This leads to inconsistent behaviour between reading an input or holding register.
Can you confirm this is a bug, or is this intended behaviour and I'm missing something here?