Hotfix/mpu config#552
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jorgesg82 merged 2 commits intodevelopmentfrom Jan 25, 2026
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Pull request overview
This PR adjusts MPU region attributes to use a flash configuration that avoids undefined behavior and aligns with ST’s recommended settings, and clarifies/aligns comments and attributes for various memory regions.
Changes:
- Updated the flash MPU region to use TEX=0, C=1, B=0 (Normal, write-through, no read-allocate) and kept it non-shareable for full caching, matching ST’s documented configuration.
- Documented and configured the dynamic MPU region as Normal, non-cacheable, shareable memory for multi-master access.
- Updated MPU attributes and comments for ITCM, DTCM, and D1/D2/D3 RAM regions, including making cached AXI/SRAM regions shareable and clarifying TCM behavior versus MPU settings.
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Cantonplas
approved these changes
Jan 25, 2026
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Was using a configuration that caused undefined behaviour for flash, now using the correct one.
Check this application note