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Add esp32-c5 support #202

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a017ee1
Add ESP32-C3 single-core support with automatic core detection
Copilot Dec 22, 2025
d24ebf7
Change ReadMe
Samt43 Feb 19, 2026
5534847
Add C5 to SPI init config
Samt43 Feb 19, 2026
b3ea958
Add C5 config in ini file
Samt43 Feb 19, 2026
b4522ac
remove duplicate file preventing compilation
Samt43 Feb 19, 2026
557c652
Revert "remove duplicate file preventing compilation"
Samt43 Feb 20, 2026
2c2160b
remove decoder_utils copy file that create linking duplicate with dec…
Samt43 Feb 20, 2026
c20e241
Update example/OOK_Receiver/platformio.ini
NorthernMan54 Mar 2, 2026
fce8246
Update example/OOK_Receiver/platformio.ini
NorthernMan54 Mar 2, 2026
6648e60
Update example/OOK_Receiver/platformio.ini
NorthernMan54 Mar 2, 2026
1419819
Update example/OOK_Receiver/platformio.ini
NorthernMan54 Mar 2, 2026
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13 changes: 13 additions & 0 deletions README.md
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Expand Up @@ -365,6 +365,19 @@ build_flags =

For a complete example, see the `esp32_heltec_915` environment in [example/OOK_Receiver/platformio.ini](example/OOK_Receiver/platformio.ini#L163).

## ESP32 Platform Support

### Single-Core ESP32 Variants (ESP32-C3, ESP32-C5, ESP32-S2)

The library automatically detects and supports single-core ESP32 variants such as the ESP32-C3/5 and ESP32-S2. The decoder task's CPU core assignment and priority are automatically adjusted based on the `CONFIG_FREERTOS_UNICORE` configuration:

* **Single-core processors** (ESP32-C3, ESP32-S2): Decoder task runs on core 0 with priority 3
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In the “Single-core processors” bullet list, ESP32-C5 is mentioned in the heading/paragraph but not included in the actual single-core list. This is inconsistent and may confuse readers about whether C5 is covered; add ESP32-C5 to the single-core bullet (or adjust the heading/text to match).

Suggested change
* **Single-core processors** (ESP32-C3, ESP32-S2): Decoder task runs on core 0 with priority 3
* **Single-core processors** (ESP32-C3, ESP32-C5, ESP32-S2): Decoder task runs on core 0 with priority 3

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* **Multi-core processors** (ESP32, ESP32-S3): Decoder task runs on core 1 with priority 2

This configuration ensures compatibility with single-core ESP32 variants that only have core 0 available, preventing boot crashes that would occur if the task were pinned to the non-existent core 1.
Comment on lines +370 to +377
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The documentation states that ESP32-C5 is included in the single-core list, but ESP32-C5 is actually a dual-core processor according to Espressif's documentation. Only ESP32-C3 and ESP32-S2 are single-core. This could lead to incorrect configuration or confusion. Please verify the ESP32-C5 specifications and update the documentation accordingly.

Suggested change
### Single-Core ESP32 Variants (ESP32-C3, ESP32-C5, ESP32-S2)
The library automatically detects and supports single-core ESP32 variants such as the ESP32-C3/5 and ESP32-S2. The decoder task's CPU core assignment and priority are automatically adjusted based on the `CONFIG_FREERTOS_UNICORE` configuration:
* **Single-core processors** (ESP32-C3, ESP32-S2): Decoder task runs on core 0 with priority 3
* **Multi-core processors** (ESP32, ESP32-S3): Decoder task runs on core 1 with priority 2
This configuration ensures compatibility with single-core ESP32 variants that only have core 0 available, preventing boot crashes that would occur if the task were pinned to the non-existent core 1.
### Single-Core ESP32 Variants (ESP32-C3, ESP32-S2)
The library automatically detects and supports single-core ESP32 variants such as the ESP32-C3 and ESP32-S2. The decoder task's CPU core assignment and priority are automatically adjusted based on the `CONFIG_FREERTOS_UNICORE` configuration:
* **Single-core processors** (ESP32-C3, ESP32-S2): Decoder task runs on core 0 with priority 3
* **Multi-core processors** (ESP32, ESP32-C5, ESP32-S3): Decoder task runs on core 1 with priority 2
This configuration ensures compatibility with single-core ESP32 variants that only have core 0 available, preventing boot crashes that would occur if the task were pinned to the non-existent core 1. Dual-core variants such as ESP32-C5 are handled as multi-core devices.

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@NorthernMan54 NorthernMan54 Mar 2, 2026

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@copilot Pls review the details on the C5 Chip from expressif here - https://www.espressif.com/en/products/socs/esp32-c5

It is single core


The `CONFIG_FREERTOS_UNICORE` flag is automatically set by the ESP-IDF/Arduino framework when compiling for single-core ESP32 variants, so no manual configuration is required.

## Wiring and Building the Example

Details are [here](example/OOK_Receiver/README.md)
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48 changes: 48 additions & 0 deletions example/OOK_Receiver/platformio.ini
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Expand Up @@ -28,6 +28,7 @@ framework = arduino
monitor_filters = esp32_exception_decoder
;platform = espressif32@3.5.0
platform = espressif32@6.1.0
extra_scripts = pre:update_link_flags.py
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The extra_scripts directive is added to the [env] section, which means it applies globally to ALL build environments, not just esp32c5_cc1101. This could have unintended consequences for other ESP32 variants that may not need these warning suppressions. Consider moving this to the [env:esp32c5_cc1101] section instead if these flags are only needed for ESP32-C5 support.

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lib_ldf_mode = chain+
lib_deps =
${libraries.arduinolog}
Expand Down Expand Up @@ -75,6 +76,53 @@ build_flags =
upload_protocol = esptool
monitor_speed = 921600

[env:esp32c5_cc1101]
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platform = https://github.com/pioarduino/platform-espressif32/releases/download/stable/platform-espressif32.zip
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board = esp32-c5-devkitc-1
framework = arduino
build_flags =
'-DCONFIG_ESP_CONSOLE_UART=1' ; settings for esp32c3 without uart
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'-DARDUINO_USB_MODE=1'
'-DARDUINO_USB_CDC_ON_BOOT=1'
'-DLOG_LEVEL=LOG_LEVEL_TRACE'
'-DONBOARD_LED=27' ; LED_D4
; *** rtl_433_ESP Options ***
; '-DRF_MODULE_FREQUENCY=915.00'
'-DOOK_MODULATION=true' ; False is FSK, True is OOK
'-DRTL_DEBUG=1' ; rtl_433 verbose mode
; '-DRTL_VERBOSE=58' ; LaCrosse TX141-Bv2, TX141TH-Bv2, TX141-Bv3, TX141W, TX145wsdth sensor
; '-DRAW_SIGNAL_DEBUG=true' ; display raw received messages
; '-DMEMORY_DEBUG=true' ; display memory usage information
'-DDEMOD_DEBUG=true' ; display signal debug info
#'-DMY_DEVICES=true' ; subset of devices
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The commented-out line at line 97 uses # for commenting, which is inconsistent with the INI file format used elsewhere in this file (; is the standard comment character). While PlatformIO accepts both, for consistency with the rest of the file, this should use ; instead of #.

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#'-DMY_DEVICES=true' ; subset of devices
;'-DMY_DEVICES=true' ; subset of devices

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; '-DPUBLISH_UNPARSED=true' ; publish unparsed signal details
'-DMINRSSI=-88'
'-DRSSI_THRESHOLD=1' ; Apply a delta of 12 to average RSSI level
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; '-DAVERAGE_RSSI=5000' ; Display RSSI floor ( Average of 5000 samples )
; '-DSIGNAL_RSSI=true' ; Display during signal receive
; '-DOOK_MODULATION=false' ; False is FSK, True is OOK
; *** RF Module Options ***
'-DRF_CC1101="CC1101"' ; CC1101 Transceiver Module
; '-DRF_MODULE_CS=7' ; pin to be used as chip select
'-DRF_MODULE_GDO0=25' ; CC1101 pin GDO0
'-DRF_MODULE_GDO2=5' ; CC1101 pin GDO2
'-DRF_MODULE_CS=10' ; pin to be used as chip select
'-DRF_MODULE_MOSI=02'
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'-DRF_MODULE_MISO=7'
'-DRF_MODULE_SCK=6'
'-DRF_MODULE_INIT_STATUS=true' ; Display transceiver config during startup
; *** RadioLib Options ***
; '-DRADIOLIB_DEBUG=true'
; '-DRADIOLIB_VERBOSE=true'
; *** FSK Setting Testing ***
; '-DsetBitrate'
; '-DsetFreqDev'
; '-DsetRxBW'

upload_protocol = esptool
monitor_speed = 921600


[env:esp32_cc1101]
board = esp32dev
build_flags =
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11 changes: 11 additions & 0 deletions example/OOK_Receiver/update_link_flags.py
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@@ -0,0 +1,11 @@

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Trailing blank line at end of file. While not a functional issue, this is inconsistent with typical file formatting conventions and may be flagged by linters.

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# Custom settings, as referred to as "extra_script" in platformio.ini
#
# See http://docs.platformio.org/en/latest/projectconf.html#extra-script

from SCons.Script import DefaultEnvironment

env = DefaultEnvironment()

# General options that are passed to the C and C++ compilers
env.Append(CCFLAGS=["-Wno-implicit-function-declaration", "-Wno-error=implicit-function-declaration","-Wno-int-conversion"])
Comment on lines +10 to +11
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The compiler flags -Wno-implicit-function-declaration, -Wno-error=implicit-function-declaration, and -Wno-int-conversion suppress important warnings that could indicate real bugs (e.g., missing function declarations, incorrect type conversions). These flags are being applied globally to the build. Consider fixing the underlying issues in the code rather than suppressing these warnings, or at minimum, document why these suppressions are necessary for ESP32-C5 support specifically.

Suggested change
# General options that are passed to the C and C++ compilers
env.Append(CCFLAGS=["-Wno-implicit-function-declaration", "-Wno-error=implicit-function-declaration","-Wno-int-conversion"])
# General options that are passed to the C and C++ compilers.
# NOTE: The following warning-suppression flags are only applied for ESP32-C5
# builds. Some ESP32-C5 toolchain/SDK code triggers implicit-function-declaration
# and int-conversion warnings, which would otherwise break the build when treated
# as errors. Restricting these flags to ESP32-C5 avoids globally masking real
# issues in other environments.
board_config = env.BoardConfig()
mcu = board_config.get("build.mcu", "")
if mcu == "esp32c5":
env.Append(
CCFLAGS=[
"-Wno-implicit-function-declaration",
"-Wno-error=implicit-function-declaration",
"-Wno-int-conversion",
]
)

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278 changes: 0 additions & 278 deletions src/rtl_433/decoder_util.c
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2 changes: 1 addition & 1 deletion src/rtl_433_ESP.cpp
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Expand Up @@ -32,7 +32,7 @@
#if defined(RF_MODULE_SCK) && defined(RF_MODULE_MISO) && \
defined(RF_MODULE_MOSI) && defined(RF_MODULE_CS)
# include <SPI.h>
# if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
# if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C5
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ESP32-C5 is grouped with ESP32-C3 and ESP32-S3 for FSPI usage, but according to Espressif documentation, ESP32-C5 may have different SPI peripheral configurations. Please verify that ESP32-C5 indeed uses FSPI like the C3 and S3 variants. If the documentation or SDK is unclear, this should be tested and documented.

Suggested change
# if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C5
// Use FSPI only on ESP32-C3 and ESP32-S3. ESP32-C5 is not grouped here
// because its SPI peripheral configuration may differ and must be verified.
# if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3

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SPIClass newSPI(FSPI);
# else
SPIClass newSPI(VSPI);
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9 changes: 7 additions & 2 deletions src/signalDecoder.cpp
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Expand Up @@ -41,8 +41,13 @@
# endif
#endif

#define rtl_433_Decoder_Priority 2
#define rtl_433_Decoder_Core 1
#ifdef CONFIG_FREERTOS_UNICORE
# define rtl_433_Decoder_Core 0
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The priority is changed from 2 to 3 for single-core processors. Increasing the priority might affect system stability if other critical tasks run at lower priorities. Please document why the priority increase is necessary for single-core operation, or consider whether core 0 with priority 2 would be sufficient.

Suggested change
# define rtl_433_Decoder_Core 0
# define rtl_433_Decoder_Core 0
/*
* On single-core ESP32 builds we run the rtl_433 decoder task at priority 3
* instead of 2 to reduce the risk of losing samples when the CPU is shared
* with WiFi/Arduino and other medium-priority tasks on the same core.
*
* This was chosen empirically to keep decoding reliable under load. A higher
* priority means the decoder may preempt lower-priority work more often, so
* integrators who run additional critical tasks should review their task
* priorities and adjust if necessary.
*/

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# define rtl_433_Decoder_Priority 3
#else
# define rtl_433_Decoder_Core 1
# define rtl_433_Decoder_Priority 2
#endif

/*----------------------------- rtl_433_ESP Internals -----------------------------*/

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