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Merged
lgirdwood merged 15 commits into from
May 26, 2026
Merged

acp: add native Zephyr drivers for AMD ACP 7.X #10777

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f7c7956
scripts: add support for ACP_7_X platform
sneha-voona Apr 10, 2026
0ddd1d4
src: arch: xtensa: configs: add ACP_7_X defconfig
sneha-voona Apr 10, 2026
de2b148
tools: topology: add ACP_7_X topology support for native Zephyr
sneha-voona Apr 10, 2026
d24bafc
rimage: config: add acp_7_x toml file to support acp_7_x build
sneha-voona Apr 10, 2026
9040080
amd: acp_7_x: add build support for ACP_7_X
sneha-voona Apr 10, 2026
2be9e8b
platform: add ACP_7_X platform support for native Zephyr
sneha-voona Apr 29, 2026
8cc4ed0
dai: acp_7_x: add SDW DMA and DAI support for ACP_7_X
sneha-voona Apr 29, 2026
c0867a5
volume: fix scaling function reset after max volume
sneha-voona May 21, 2026
d52f73f
acp_7_x: defconfig: enable volume component
sneha-voona May 21, 2026
75dcc90
tools: topology: add ACP_7_X SDW volume topology
sneha-voona May 21, 2026
48685cb
pcm_converter: add S24_4LE_MSB conversion support for IPC3
sneha-voona May 21, 2026
686cb0d
ipc3: dai: override S24_4LE to S24_4LE_MSB for AMD SDW DAI
sneha-voona May 21, 2026
03cf70b
acp_7_x: board: enable S24_4LE_MSB PCM converter format
sneha-voona May 21, 2026
b22582f
tools: topology: add ACP_7_X SDW 24-bit topology
sneha-voona May 21, 2026
e57b2d7
schedule: amd: set LL timer period to 500us for AMD ACP platforms
sneha-voona May 21, 2026
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34 changes: 29 additions & 5 deletions src/ipc/ipc3/dai.c
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Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,8 @@

LOG_MODULE_DECLARE(ipc, CONFIG_SOF_LOG_LEVEL);

#define DAI_INDEX_INVALID 0xFFFF

void dai_set_link_hda_config(uint16_t *link_config,
struct ipc_config_dai *common_config,
const void *spec_config)
Expand Down Expand Up @@ -93,7 +95,10 @@ int dai_config_dma_channel(struct dai_data *dd, struct comp_dev *dev, const void
break;
case SOF_DAI_AMD_HS:
case SOF_DAI_AMD_HS_VIRTUAL:
case SOF_DAI_AMD_SDW:
case SOF_DAI_AMD_SDW: {
struct dai_config *params = (struct dai_config *)dd->dai->dev->config;

params->dai_index = dd->dai->index;
channel = dai_get_handshake(dd->dai, dai->direction,
dd->stream_id);
#if defined(CONFIG_SOC_ACP_7_0)
Expand All @@ -102,6 +107,7 @@ int dai_config_dma_channel(struct dai_data *dd, struct comp_dev *dev, const void
}
#endif
break;
}
case SOF_DAI_MEDIATEK_AFE:
handshake = dai_get_handshake(dd->dai, dai->direction,
dd->stream_id);
Expand Down Expand Up @@ -210,12 +216,18 @@ int ipc_dai_data_config(struct dai_data *dd, struct comp_dev *dev)
pin_data->pin_num = dd->dai->index;
pin_data->pin_dir = dai->direction;
#ifdef CONFIG_ZEPHYR_NATIVE_DRIVERS
pin_data->dma_channel = dd->chan_index >= 0 ? dd->chan_index : 0xFFFF;
pin_data->dma_channel = dd->chan_index >= 0 ? dd->chan_index : DAI_INDEX_INVALID;
#else
pin_data->dma_channel = dd->chan ? dd->chan->index : DAI_INDEX_INVALID;
#endif
#if defined(CONFIG_SOC_ACP_7_X)
for (int i = 0; i < SDW_INSTANCES; i++) {
pin_data->index[i] = DAI_INDEX_INVALID;
}
#else
pin_data->dma_channel = dd->chan ? dd->chan->index : 0xFFFF;
pin_data->index = DAI_INDEX_INVALID;
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@lyakh lyakh May 26, 2026

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indentation seems wrong

#endif
pin_data->index = 0xFFFF;
pin_data->instance = 0xFFFF;
pin_data->instance = DAI_INDEX_INVALID;
dev_data->dai_index_ptr = pin_data;
}
#endif
Expand Down Expand Up @@ -314,6 +326,18 @@ void dai_dma_release(struct dai_data *dd, struct comp_dev *dev)
return;
}

#if defined(CONFIG_AMD)
/* Free DAI-specific data allocated in ipc_dai_data_config() */
if (dd->dma && dd->dma->z_dev && dd->dma->z_dev->data) {
struct acp_dma_dev_data *dev_data = dd->dma->z_dev->data;

if (dev_data->dai_index_ptr) {
rfree(dev_data->dai_index_ptr);
dev_data->dai_index_ptr = NULL;
}
}
#endif

/* put the allocated DMA channel first */
#ifdef CONFIG_ZEPHYR_NATIVE_DRIVERS
if (dd->chan_index >= 0) {
Expand Down
4 changes: 2 additions & 2 deletions zephyr/lib/dma.c
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Original file line number Diff line number Diff line change
Expand Up @@ -212,7 +212,7 @@ SHARED_DATA struct sof_dma dma[] = {
.z_dev = DEVICE_DT_GET(DT_NODELABEL(host_dma)),
},
#endif /* CONFIG_SOC_MIMX9596_M7 */
#if defined(CONFIG_SOC_ACP_7_0)
#if defined(CONFIG_SOC_ACP_7_0) || defined(CONFIG_SOC_ACP_7_X)
{
.plat_data = {
.dir = SOF_DMA_DIR_LMEM_TO_HMEM |
Expand All @@ -233,7 +233,7 @@ SHARED_DATA struct sof_dma dma[] = {
.caps = SOF_DMA_CAP_SW,
.base = DMA0_BASE,
.chan_size = DMA0_SIZE,
.channels = 12,
.channels = DT_PROP(DT_NODELABEL(acp_sdw_dma), dma_channels),
.period_count = 2,
},
.z_dev = DEVICE_DT_GET(DT_NODELABEL(acp_sdw_dma)),
Expand Down