𝗖𝗼𝗺𝗽𝘂𝘁𝗲𝗿 𝗢𝗿𝗴𝗮𝗻𝗶𝘇𝗮𝘁𝗶𝗼𝗻 & 𝗔𝗿𝗰𝗵𝗶𝘁𝗲𝗰𝘁𝘂𝗿𝗲 | 𝗖𝗦𝟯𝟵𝟬𝟬𝟭

Design & Synthesis of several digital circuits in VHDL and Verilog. Scripting in TCL, simulation with Intel® ModelSim®, and synthesis under Synopsys® DC Ultra™.

Verilog, standardized as IEEE 1364, is a hardware description language used to model electronic systems. This repository consists of Verilog HDL lab experiments conducted in course EEL2020 Digitial Design at IIT Jodhpur

An 8-bit calculator that can multiply, add and subtract. Created and simulated in Quartus Prime and physically implemented in DEC-SOC1 FPGA.

A Nanoprocessor designed to run on the Basys3 FPGA desgined using Xlinx Vivado with VHD using Registers, Add/Sub Unit, Decoders, Multiplexers which have been implemented seperately.

Circuits of combinational elements

COE328 - This course focuses on the fundamentals of digital logic circuits and the principles of designing modern digital systems, offered at TMU, formerly known as Ryerson.

Logisim circuit files for CSE 2104 Digital Logic Design Sessional at RUET — covering gates, adders, decoders, multiplexer, flip-flops, counters, register and more, including extra circuits beyond the lab manual.

"Verilog_HDL" repository contains hardware description language (HDL) code written in Verilog for various digital logic and electronic designs."

FPGA Projects

This repository contains several VHDL codes of signal processing

porject from designing with VHDL course. Includes, FSM (finite state machine), next state logic,seven-segment-display-decode, full adder, flip flops, D_flip-flops, ripple carry adder, full adder, half adder, delay propagation

Learned as a part of CS210 course